1. Field of the Invention
The present invention relates to an information recording and reproducing apparatus, or in particular to a technique for improving the detection rate of a data synchronizing (hereinafter referred to as xe2x80x9csyncxe2x80x9d) signal by improving the performance of data discrimination of a data sync signal section.
2. Description of the Related Art
FIG. 27 shows an example of the recording format in a magnetic disk device. Data are recorded or reproduced in and from each sector of a recording medium constituting a unit storage area. Each sector includes a PLO (phase locked oscillator) sync area 76 for pull-in of a PLL (phase locked loop), a data sync signal 77 for producing a decode timing signal for a modulated code by detecting the start position of the data, a data section 78 for actually recording and reproducing the data, and a CRC (cyclic redundancy check) or an ECC (error correcting code) 79 for detecting or correcting errors. A gap 80 constituting a pattern for absorbing various delay time is arranged between the sectors.
It is well known that accurate detection of the data sync signal 77 is very important for decoding the following data section 78. Even in the case where the data decoded in the data section 78 has a very good error rate, a detection error (i.e. failure to detect at the right position or detection at a wrong position) of the data sync signal 77 which is normally about several bytes will lead to the failure to correctly decode the subsequent data section 78 which lasts several tens of bytes to several hundred bytes, thereby extremely deteriorating the whole error rate.
A device for detecting a data sync signal is disclosed, for example, in JP-A-2000-100084. This device is intended to produce a high ability to detect the data sync signal by correcting a discrimination error, if any, of the data sync signal. With this device, as shown in FIG. 28, input data 411 are discriminated by a data discriminator 401, and an output signal 412 thereof is input to a postcoder 402 for the data and a postcoder 403 for the data sync. The data postcoder 402 subjects the output signal 412 of the data discriminator 401 to the postcoding process (bit operation) and produces an output signal 415. This postcoding process generally corresponds to the preceding process for recording in order to assure correspondence between the data coding for recording and the decoding for reproduction.
The data sync postcoder 403, on the other hand, subjects the output signal 412 of the data discriminator 401 to a postcoding process (bit operation) different from that of the data postcoder 402, and produces an output signal 413. This postcoding process corresponds to a data sync signal detection method to assure an optimum detection of a data sync signal.
The output signal 413 of the data sync postcoder 403 is input to a data sync signal detector 404 which detects a data sync signal by comparing the signal with a predetermined sync pattern. Upon detection of a sync signal, a sync signal detection output 414 is produced and gives a timing for decoding a postcoded output signal 415 in a decoder 405 which outputs a decoded output data 416.
Even with this configuration, a further improvement in the detection rate of the data sync signal is desired in view of the fact that the data section is accompanied by an error correction code for correcting a discrimination error and that the requirement of increasing the amount of information recorded per unit area of an information recording medium as far as possible to reduce the cost necessitates the correct data reproduction even with a deteriorated reproduced signal quality.
A related technique is described in a reference entitled xe2x80x9cDistance Enhancing Codes for E2PRML: Performance Comparison using Spinstand Dataxe2x80x9d, by Steven G. McCarthy, Zachary A. Keirn, et al., IEEE. Trans. Magn. Vol. 33, No. 5, September 1997. This reference reports a research in which the performance of various codes for improving the reproduction performance are compared using spindstand data. In this reference, a method of producing the coding gain of 2.2 dB is disclosed in which the (1, 7) code constituting the (d, k) code having a code rate of 2/3 is combined with a Viterbi decoder of EEPRML (extended extended partial response with maximum likelihood detection) type having a reduced number of states to enhance the inter-code minimum square distance from 6 to 10 without considering the code rate loss. In this method, however, the code rate is as low as 2/3. Thus, the bit interval is required to be reduced as compared with other codes of high code rate for recording the same amount of information, and therefore the performance cannot be improved.
JP-A-8-096312, on the other hand, discloses a method in which a pattern having no continuous data inversion is used as a data sync signal.
Further, JP-A-11-251927 discloses a method for discriminating the data sync signal (sync bytes) and the data code string in the configuration of what is called the time varying MTR (maximum transition run) trellis. According to this method, the data sync signal is detected regardless of the time limit, while the data code string is detected according to a time limit. Also in this case, the detection of the data sync signal is dependent on the limit of the data code string, and what can be achieved is not more than the trellis with the limited path of the time varying MTR trellis of the data code string. In other words, since the decoding of a time limited code is presupposed, the data sync signal can be detected in a state equivalent to the highest detection accuracy in the state of the data code, but the data sync signal cannot be detected with higher accuracy than for the data code discrimination.
Furthermore, JP-A-11-339403 discloses a method in which the state of a Viterbi decoder is limited when decoding the signal in the VFO (variable frequency oscillator) field corresponding to the PLO sync section according to the invention described later. In this method, however, although the accuracy can be improved for the bit sync (i.e. the clock reproduction) for the data, the detection performance of the data sync signal cannot be improved in view of the fact that the data sync signal is detected by detecting the data start position in the same state of the Viterbi decoder as when the data portion is detected. The performance can be improved only slightly by the fact that the bit sync accuracy for the data is improved for a higher accuracy of clock reproduction.
Accordingly, the object of the present invention is to detect the data sync signal with higher accuracy and thereby to improve the detection rate.
According to a first aspect of the invention, there is provided an information recording and reproducing apparatus comprising a data discriminator including data discrimination means and sync signal discrimination means, wherein the detection of the data sync signal is carried out for a discriminated bit string output from the sync signal discrimination means while at the same time carrying out the data demodulation for a discriminated bit string output from the data discrimination means. As a result, the discrimination of the data sync signal and the data reproduction and demodulation can be carried out in the way most suitable for each of the data sync signal and the data. Thus, an accurate data sync signal detection with only a small amount of error is made possible, and the detection performance of the data sync signal can be improved while maintaining the data discrimination performance. In the case where the Viterbi decoder is used as the data discrimination means and the sync signal discrimination means for optimization described above, the number of states, the number of paths for state transition and the path memory length can be optimized.
According to a second aspect of the invention, there is provided an information recording and reproducing apparatus comprising a single (shared) data discrimination means, wherein the configuration of the data discrimination means is switched thereby to switch the discrimination characteristic using the data sync signal detection output obtained by data sync signal detection. With this configuration, the circuit size can be reduced. Also, during the data sync signal detection and the data demodulation following the data sync signal, the discrimination means is temporally optimized in a form suitable for the data sync signal discrimination and detection on the one hand and the data reproduction and demodulation on the other hand, respectively. In this way, the detection performance of the data sync signal can be improved while maintaining the data discrimination performance. Further, using a Viterbi decoder as data discrimination means, the configuration can be switched to optimize the number of states, the number of paths for state transition and the path memory length for each of data discrimination and sync signal discrimination.
Furthermore, delay means for delaying the input data to the data discrimination means can be provided to apply the output of the delay means to the data discrimination means by the sync signal detection signal output from the data sync signal detection means. This configuration makes it possible to effectively use the data corresponding to the delay time required for discrimination in the data discrimination means when switching the configuration of the data discrimination means.
In any of the aforementioned cases, some path convergence patterns are required for converging the discrimination of the data sync signal correctly, and the particular patterns are required to be written in an information recording medium.
According to a third aspect of the invention, in order to eliminate the path convergence pattern, the head of the data section following the data sync signal is coded by a first data coding scheme coincident with the limitation of the signal string of the data sync signal and recorded and reproduced in and from the information recording medium, while the remaining data are coded by a second data coding scheme for improving the data recording and reproduction performance, and recorded and reproduced in and from the information recording medium. Also in this case, the use of a Viterbi decoder as data discrimination means makes it possible to optimize the number of states, the number of paths for state transition and the path memory length for each of the data discrimination means and the sync signal discrimination means or each of the time for the data discriminating operation and the sync signal discriminating operation.
According to a fourth aspect of the invention, the characteristics of a low-pass filter and the equalizing means providing signal processing means are switched to optimized ones for the sync signal and the data by the sync signal detection output. Also in this case, wasteful data can be reduced by providing delay means in the input portion of the equalizing means for delaying the input signal of the equalizing means and inputting the output of the delay means to the equalizing means by the sync signal detection signal output from the data sync signal detection means.
According to a fifth aspect of the invention, the signal processing means includes storage means for storing digitized information, information after equalization and information after discrimination. When storing the information, the data sync signal is detected. According to the timing of data sync signal detection, the position of information output from the storage means is determined and the information is output thereby to perform the data discrimination and the data demodulation. In case of failure to detect the data sync signal at the first detecting session, the information for data sync detection is stored together in the storage means, and by outputting the particular information from the storage means, the data sync signal can be detected for different characteristics of the equalizing means and the data discrimination means.
As a predetermined data sync signal, the data sync signal having no continuous inversion of the data recorded in the recording medium is selectively used.